1. Field of the Invention
The present invention relates to an information processing apparatus which forms a close coupling multi processor system, particularly to an information processing apparatus in which the activity efficiency is improved or an information processing apparatus in which the interruption handling is efficiently executed. In addition, the present invention relates to a method for processing information by utilizing the above information processing means.
2. Description of the Background Art
Conventionally, as shown in FIG. 1, an information processing apparatus 11 comprises a main processor 12 for processing application programs and system programs, a memory 13 for storing the application programs and the system programs, and a bus 14 for transmitting the application programs and the system programs between the main processor 12 and the memory 13.
Moreover, the main processor 12 comprises an internal state memory 15 having a register 16, a stack pointer 17 and a program counter 18, an application supporting unit 19 for supporting the execution of application programs, and a system supporting unit 20 for supporting the execution of system programs.
Specifically, the application supporting unit 19 is a memory controller or a floating point arithmetic unit. The system supporting unit 20 is an execution unit for executing special instructions in the system program.
The application program is a main operation program for operating the information processing apparatus 11 as a main purpose. On the other hand, the system program is a control program for controlling the operation in the information processing apparatus 11. The system program is executed as an interruption handling when the application program is in execution.
Further, the memory 13 comprises a plurality of context blocks 21 (21a, 21b, and 21c) for storing contents of the internal state memory 15. The contents stored in the internal state memory 15 are called a context. In other words, a context is made up of the contents of the register 16, the stack pointer 17 and the program counter 18 in the main processor 12 with the register 16, the stack pointer 17 and the program counter 18.
The number of the context blocks 21 is equal to the number of the application programs which are executed in the main processor 12. That is, each context block 21 corresponds to an application program.
In the above configuration of the information processing apparatus 11, one application program is executed in the main processor 12 to renew the content of the internal state memory 15 according to the instruction of the application program. That is, the application program is executed to renew the contents of the register 16, the stack pointer 17 and the program counter 18 while being supported by the application supporting unit 19.
Therefore, the contents of the internal state memory 15 reflect what is executed in the main processor 12. That is, in the case where the execution in the internal state memory 15 is suspended and the contents of the internal state memory 15 are stored in a corresponding context block 21 at a time T, the execution can be resumed from the suspended state of the contents at a prescribed time after the suspended contents stored in the corresponding context block 21 are restored in the internal state memory 15.
In the case where a plurality of application programs are respectively executed in time sharing in the main processor 12, the contents of one application program are stored in a corresponding context block 21 when another application program is executed in the main processor 12.
FIG. 2 is one example of a time chart showing the execution of application program 1, application program 2, and a system program in time sharing.
For the above execution, as shown in FIG. 1, a context CTX1 which is the contents of the application program AP1 can be stored in a context block 21a. In the same manner, a context CTX2 which Is the contents of the application program AP2 can be stored In a context block 21b and a context CTX3 which is the contents of the application program AP3 can be stored in a context block 21c.
As shown in FIG. 2, In the case where an request for replacing the application program AP1 with another application program occurs when the application program AP1 is in execution in the main processor 12, the execution of a specific Instruction in the application program AP1 is suspended so that a system program SP is executed to handle the request while being supported by the supporting unit 20. By the execution of the system program SP, the next application program to be executed is determined.
In the case where the execution of the application program AP1 is replaced with the execution of the application program AP2, the context CTX1 is transmitted to the context block 21a from the internal state memory 15 so that the execution of the application program AP1 is suspended. And then, by the execution of the system program SP, the context CTX2 stored in the context block 21b is transmitted to the internal state memory 15 so that the application program AP2 is executed.
In the case where the execution of the application program AP1 is resumed from the suspended state of the program AP1, under the control of the system program, the context CTX2 is transmitted to the context block 21b from the internal state memory 15 and the context CTX1 stored in the context block 21a is transmitted to the internal state memory 15. Therefore, the specific instruction in the application program AP1, which has been suspended by the system program, is executed.
In summary, a plurality of application programs are respectively executed in time sharing in the main processor 12 and the system program Is executed to handle the request.
Accordingly, in the conventional information processing apparatus 11, a plurality of application programs and the system program can respectively be executed in time sharing in the main processor 12.
However, the application supporting unit 19 is not utilized when the system program is executed. In the same manner, the system supporting unit 20 is not utilized when the application program is executed. In other words, when the system program is executed, the application program cannot be executed.
Therefore, the activity efficiency of the supporting units 19, 20 attached to the main processor 12 is inferior.
Next, a second conventional information processing apparatus 31 is explained with reference to FIGS. 3, 4.
In the information processing apparatus 31, an external interruption signal is provided from outside the information processing apparatus 31, while the request for replacing the application program is provided from an internal unit in the first conventional information processing apparatus 11.
As shown in FIG. 3, a main processor 32 is connected with a signal line to which an external interruption signal is transmitted. Therefore, in the case where the external interruption signal is not provided to the main processor 32, a general task which belongs to the group of the application programs is executed in the main processor 32. On the other hand, In the case where the external interruption signal is provided to the main processor 32. the execution of the general task is suspended so that an external-interruption-handler, which belongs to the group of the application programs, is executed in the main processor 32 to process the contents designated by the external interruption signal.
The contents of the external-interruption-handier are normally simpler than those of the general task. Therefore, the execution of the general task is resumed after the execution of the external-interruption-handler is finished in the main processor 32. The replacement of the application programs is shown in FIG. 4.
FIG. 4 is a time chart showing the replacement of the application programs between the general task and the external-interruption-handler.
However, as shown in FIG. 4, as for a register utilized for executing the external-interruption-handler, the contents stored in the register must be saved somewhere when the external-interruption-handler is executed. In addition, the saved contents of the register must be restored to the register when the execution of the external-interruption-handler is finished. That is, a first instruction in the external-interruption-handler is a "SAVE" instruction and a final instruction Is a "RESTORE" instruction.
Therefore, the handling time for handling the external-interruption-handler is prolonged. Moreover, the "SAVE" and "RESTORE" instructions must be executed for each operation of the external-interruption-handler.
Accordingly, the execution in the external-interruption-handler is inefficient.
Moreover, because the execution of the general task is suspended for the provision of each external interruption signal, the execution time of the genera/task is influenced by the provision frequency of the external Interruption signals.
Further, the external-interruption-handler is easily handled. On the other hand, a high level function such as a floating point function, a pipe line function, or the like is recently required in the main processor 32. Therefore, many functions unnecessary for executing the external-interruption-handler exist in the main processor 32.
Therefore, in the case where the external-interruption-handler is executed, the main processor is monopolized by the external-interruption-handler so that the utilization of the high level functions in the main processor 32 is inefficient.